<?xml version="1.0" encoding="utf-8"?>
<rss version="2.0" xmlns:media="http://search.yahoo.com/mrss/" xmlns:georss="http://www.georss.org/georss">
  <channel>
    <image>
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    </image>
    <title>Intilop - Latest Press Releases on ReleaseWire</title>
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    <description/>
    <language>en-us</language>
    <link xmlns="http://www.w3.org/2005/Atom" href="http://sbwire.superfeedr.com/" rel="hub"/>
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    <item>
      <title>Intilop and Altera to Present a Live Demo of 10G Ultra Low Latency UDP Offload Core Using Altera's OpenCLTM at the SC-12 Conference in Salt Lake City, Utah</title>
      <link>http://www.releasewire.com/press-releases/release-3.htm</link>
      <description><![CDATA[<div class="newsleft"><div class="newsbody"><p class="subheadline">The 2-Server system using Intilop’s UDP Offload Core and OpenCL implementing NASDAQ’s OPRA feed on Stratix V FPGA delivers unprecedented performance, reduced development time & accelerated Time-to-Market.</p><p>Santa Clara, CA -- (<a rel="nofollow" href="http://www.sbwire.com/">SBWIRE</a>) -- 11/09/2012 --  Intilop, Inc. a pioneer and a recognized leader in providing <a class="extlink"  target="_blank"  rel="nofollow noopener" title="Ultra-Low latency networking" href="http://www.intilop.com/">Ultra-Low latency networking</a> Mega IP building blocks, systems and solutions, announced they will showcase Altera&apos;s SDK for OpenCL™ with their 4th Gen. SX-Series 10G Ultra-Low latency UDP Offload Core delivering sub-micro second wire-to-host latency. The live demo will be shown in Altera&apos;s booth #430 at the SuperComputing-12 Conference taking place November 13<sup>th</sup> thru 15<sup>th</sup>, 2012 at Salt Palace Convention Center, Salt Lake City, Utah.<br />
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Customers will be able to use Intilop&apos;s UDP IP-Core with OpenCL for implementing complex algorithms on FPGAs that will be combining the programming language with the parallel processing capabilities to deliver significantly higher system performance and shorter development times. OpenCL for FPGAs delivers a significant productivity advantage to Intilop and its end-customers by modeling algorithms in a C-based language which are then seamlessly converted to HDL. The industry leading Ultra-low-latency 10G TCP Offload with integrated OpenCL will be available soon.<br />
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"OpenCL is an open, royalty-free standard for cross-platform, parallel programming of hardware accelerators, including CPUs, GPUs and FPGAs. Our SDK for OpenCL enables software programmers to quickly and easily use the massively parallel and power efficient architecture of an FPGA to provide algorithm and upper layer protocol acceleration," said Mike Strickland, Computer &amp; Storage Sr. Product Line Manager, Altera corporation.<br />
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"We are achieving the best synergies, with our <a class="extlink"  target="_blank"  rel="nofollow noopener" title="ultra-Low latency protocol accelerators" href="http://www.intilop.com/">ultra-Low latency protocol accelerators</a> combined with Altera&apos;s robust and stable C-based OpenCL solution that not only substantially accelerates development time of high-performance, FPGA-based complex systems, but also improves time-to-market for our customers," said Kelly Masood, CTO at Intilop corporation.<br />
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Intilop&apos;s UDP, TCP Offload engines and other solutions are targeted at end equipment-makers that provide solutions to financial markets, web servers, email servers, high-end servers in Data centers; cloud computing, Government network systems and University campus network systems.<br />
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About Intilop<br />
Intilop is a developer, recognized leader and pioneer in advanced networking silicon IP and system solutions, custom hardware solutions, SoC/ASIC/FPGA integrator and total system solutions provider for Networking, Network Security, storage and Embedded Systems.<br />
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Website: <a class="extlink"  target="_blank"  rel="nofollow noopener" title="http://www.intilop.com" href="http://www.intilop.com/">http://www.intilop.com</a><br />
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Pricing and product info contact: <a class="extlink"  target="_blank"  rel="nofollow noopener" title="info@intilop.com" href="mailto:info@intilop.com">info@intilop.com</a><br />
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Booth No. 430, Salt Lake City, Utah. <a class="extlink"  target="_blank"  rel="nofollow noopener" title="http://www.sc12.supercomputing.org" href="http://www.sc12.supercomputing.org/">http://www.sc12.supercomputing.org</a><br />
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Intilop Corporation. 4800 Great America Blvd. Ste. 231. Santa Clara, CA 95054. PH: 408-496-0333<br />
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OpenCL and the OpenCL logo are trademarks of Apple, Inc. used by permission by Khronos.</p><p>For more information on this press release visit: <a rel="nofollow" href="http://www.releasewire.com/press-releases/release-3.htm">http://www.releasewire.com/press-releases/release-3.htm</a></p></div><h2>Media Relations Contact</h2><p>Kevin Moore<br />Intilop<br />Telephone: 408-496-0333<br />Email: <a rel="nofollow" href="http://www.sbwire.com/press-releases/contact/178757">Click to Email Kevin Moore</a><br />Web: <a rel="nofollow" href="http://www.intilop.com">http://www.intilop.com</a><br /></div><div><p><img src="https://cts.releasewire.com/v/?sid=178757&amp;s=f&amp;v=f" width="1" height="1" alt=""><span></span></p></div>]]></description>
      <pubDate>Fri, 09 Nov 2012 10:12:45 -0600</pubDate>
      <guid>http://www.releasewire.com/press-releases/release-3.htm</guid>
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      <title>Intilop's Patent Filings Approved by the US Patent Office for 3 Patents With 51 Claims for Their Full TCP Offload Technology.</title>
      <link>http://www.releasewire.com/press-releases/release-3.htm</link>
      <description><![CDATA[<div class="newsleft"><div class="newsbody"><p class="subheadline">Intilop secures their 76-Nanosecond Full TOE Technology with three key patents.</p><p>Santa Clara, CA -- (<a rel="nofollow" href="http://www.sbwire.com/">SBWIRE</a>) -- 09/12/2012 --  <a class="extlink"  target="_blank"  rel="nofollow noopener" title="Intilop Inc." href="http://www.intilop.com">Intilop Inc.</a>, the leading developer and provider of advanced high complexity IPs, FPGAs/ASICs and system solutions in <a class="extlink"  target="_blank"  rel="nofollow noopener" title="Network traffic acceleration" href="http://www.intilop.com">Network traffic acceleration</a> and processing plus security and storage, today announced that the three patents filed with a total of 51 claims have been accepted by the US patent office.  <br />
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These patents are designed to protect the unique algorithms, architecture and design concepts in conjunction with FPGA and ASIC hardware technology which implement a full TCP/IP stack in hardware to accelerate TCP processing in 76 nanoseconds. They were first to ship Full TCP Offload Engines on FPGAs more than 3 years ago and now are a well respected and recognized leader in Network Acceleration Technology products.<br />
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Intilop&apos;s <a class="extlink"  target="_blank"  rel="nofollow noopener" title="TCP processing hardware acceleration" href="http://www.intilop.com">TCP processing hardware acceleration</a> technology delivers nanoseconds performance which is order of magnitude superior compared to similar but much slower hardware implementations that are still in the several 100s of nanoseconds or in the microseconds. <br />
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Intilop&apos;s 10G bit TCP offload engine is essentially 20G bit (full duplex) which delivers highest throughput with lowest low latency in the industry. <br />
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"This 10G Network Acceleration Technology patent filing also covers 40G TOE that can be seamlessly scaled to operate in 40G Networks and beyond for traffic processing which raises the bar in ultra-low latency and ultra-high-performance systems. We are already shattering latency and bandwidth records with our network traffic processing engines. The fact that our IP-Cores and solutions are also highly customizable and scalable offers a very high value proposition for our customers", said K. Masood, President and CTO.<br />
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Intilop&apos;s <a class="extlink"  target="_blank"  rel="nofollow noopener" title="TCP Offload engines" href="http://www.intilop.com">TCP Offload engines</a> are targeted at markets for developers of FPGAs/ASICs/ASSPs, Network adapters plus very large scale FPGA-SoC IP integration which provide solutions for the end users in financial markets, web servers, email servers, high-end servers in Data centers, Government network systems and University campus network systems.<br />
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Intilop Corporation is a pioneer as an advanced networking and custom IP developer, SoC/ASIC/FPGA integrator and engineering services provider for Networking, Network Security, storage and Embedded Systems. They offer silicon proven semiconductor IP and services with comprehensive hardware and software development experience.<br />
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Please visit the company website at: <a class="extlink"  target="_blank"  rel="nofollow noopener" title="www.intilop.com" href="http://www.intilop.com">www.intilop.com</a><br />
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Pricing and product info contact: info@intilop.com</p><p>For more information on this press release visit: <a rel="nofollow" href="http://www.releasewire.com/press-releases/release-3.htm">http://www.releasewire.com/press-releases/release-3.htm</a></p></div><h2>Media Relations Contact</h2><p>Kevin Moore<br />Kevin Moore<br />Telephone: 408-496-0333<br />Email: <a rel="nofollow" href="http://www.sbwire.com/press-releases/contact/164235">Click to Email Kevin Moore</a><br />Web: <a rel="nofollow" href="http://www.intilop.com">http://www.intilop.com</a><br /></div><div><p><img src="https://cts.releasewire.com/v/?sid=164235&amp;s=f&amp;v=f" width="1" height="1" alt=""><span></span></p></div>]]></description>
      <pubDate>Wed, 12 Sep 2012 14:09:38 -0500</pubDate>
      <guid>http://www.releasewire.com/press-releases/release-3.htm</guid>
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      <title>Intilop's 76-nanosecond TOE Based System Etablishes a Record 93% TCP/IP Bandwidth at a Major Customer's 10G Network Deployment</title>
      <link>http://www.releasewire.com/press-releases/release-3.htm</link>
      <description><![CDATA[<div class="newsleft"><div class="newsbody"><p class="subheadline">Intilop extends their leadership in Hyper Accelerated TCP/IP processing hardware by delivering another record breaking ‘TCP performance’ in a full system deployed in a real network!</p><p>Santa Clara, CA -- (<a rel="nofollow" href="http://www.sbwire.com/">SBWIRE</a>) -- 08/02/2012 --  <a class="extlink"  target="_blank"  rel="nofollow noopener" title="Intilop, Inc." href="http://www.intilop.com">Intilop, Inc.</a> a pioneer and a recognized leader in providing highest quality complex networking Mega-IP building blocks and full systems, today announced results of performance testing underway for past several months at a major international customer. The full FPGA based System Platform powered by their latest Ultra Low latency 4th Gen <a class="extlink"  target="_blank"  rel="nofollow noopener" title="10G TOE" href="http://www.intilop.com">10G TOE</a> and Ultra Low latency Media Access controller (EMAC) that also integrates Ultra-Low Latency PHY in Altera Stratix-V FPGAs. Two of intilop&apos;s TOE based systems are connected together and are transferring very large data files achieving this level of unprecedented performance since April-May 2012. System is able to sustain the theoretical limit of 1.16 G byte per second in each direction between multiple TCP clients/servers running simultaneously.<br />
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This level of TCP data throughput performance has never been realized in any real network before. Previously most of the customers have been focusing on the benefits of ultra-low latency offered by this technology, but now its ultra-high performance aspect is also being utilized in conjunction with ultra-low-latency. Their mature, network proven series of TOE&apos;s have been deployed in hundreds of networks worldwide including blue-chip companies, financial institutions and major world stock exchanges.<br />
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The System platforms provide an &apos;out of the box&apos; ready to use FPGA board where users can immediately start integrating/running the ultra-low latency full TCP offload hardware with their application software or with their hardware applications. This offers tremendous advantages by simplifying the tedious task of integration while removing risk of integrating a complex system on an FPGA. <br />
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In addition to ultra-high TCP data throughput, the Hyper Accelerated FPGA Platform with all its integrated sub-system pegs the latency from Wire-to-User-FIFO at an unprecedented 230 ns! <br />
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This &apos;Game-changing&apos; 76 ns <a class="extlink"  target="_blank"  rel="nofollow noopener" title="TOE Technology" href="http://www.intilop.com">TOE Technology</a> delivering record 93% TCP/IP bandwidth coupled with proven ultra-high throughput is unprecedented in networks today, it is sea change as compared to legacy TCP/IP software. This is the highest performance, most deterministic performance with zero jitter shown by any complex protocol processor ever.<br />
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Intilop&apos;s series of full <a class="extlink"  target="_blank"  rel="nofollow noopener" title="TCP/UDP Offload Engines" href="http://www.intilop.com">TCP/UDP Offload Engines</a> provide enormous benefits to the whole Networking industry including: Financial, Aerospace &amp; Defense, Cloud computing, High Performance Computing, Telecom, Digital Broadcasting, Research, Data-centers, Wireless and Network storage industries. <br />
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Intilop was the first company to deliver full TCP/IP stack in FPGA in early 2009 and have consistently broken latency and performance records with their subsequent product offerings.<br />
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Availability: Now. <br />
Pricing/Product information/Demos: info@intilop.com<br />
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About Intilop:  Intilop Corporation is a developer and pioneer in advanced networking silicon SoC IP and system solutions, custom hardware solutions, SoC/ASIC/FPGA integrator and total system solutions provider for Networking, Network Security, storage and Embedded-systems. They offer silicon proven semiconductor IPs and comprehensive hardware/software solutions. <br />
<br />
Visit:  <a class="extlink"  target="_blank"  rel="nofollow noopener" title="www.intilop.com" href="http://www.intilop.com">www.intilop.com</a><br />
Intilop Corporation: 4800 Great America Pkwy. Ste-231. Santa Clara, CA 95054</p><p>For more information on this press release visit: <a rel="nofollow" href="http://www.releasewire.com/press-releases/release-3.htm">http://www.releasewire.com/press-releases/release-3.htm</a></p></div><h2>Media Relations Contact</h2><p>Kevin Moore<br />intilop.com<br />Telephone: 408-496-0333<br />Email: <a rel="nofollow" href="http://www.sbwire.com/press-releases/contact/156548">Click to Email Kevin Moore</a><br />Web: <a rel="nofollow" href="http://www.intilop.com">http://www.intilop.com</a><br /></div><div><p><img src="https://cts.releasewire.com/v/?sid=156548&amp;s=f&amp;v=f" width="1" height="1" alt=""><span></span></p></div>]]></description>
      <pubDate>Thu, 02 Aug 2012 13:57:44 -0500</pubDate>
      <guid>http://www.releasewire.com/press-releases/release-3.htm</guid>
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      <title>Intilop's 76-nanosecond Full TCP Offload (TOE) Establishes Yet Another System Latency Record With Altera Stratix-V FPGA board from BittWare</title>
      <link>http://www.releasewire.com/press-releases/release-3.htm</link>
      <description><![CDATA[<div class="newsleft"><div class="newsbody"><p class="subheadline">Intilop extends their leadership in Hyper Accelerated TCP/IP processing by delivering another record breaking ‘Wire to User Application’ full system latency of 230 Nano seconds!</p><p>Santa Clara, CA -- (<a rel="nofollow" href="http://www.sbwire.com/">SBWIRE</a>) -- 06/20/2012 --  Intilop, Inc. a pioneer and a recognized leader in providing complex networking <a class="extlink"  target="_blank"  rel="nofollow noopener" title="Mega-IP building blocks" href="http://www.intilop.com">Mega-IP building blocks</a> and full systems, today announced delivery of a full FPGA based System Platform powered by their new Ultra Low latency 4th Gen 10G Nano TOE and Ultra Low latency <a class="extlink"  target="_blank"  rel="nofollow noopener" title="Media Access controller" href="http://www.intilop.com">Media Access controller</a>. It integrates Ultra-Low Latency PHY available in Altera Stratix-V FPGAs. Full System Platform is on an Altera Stratix-V FPGA board from BittWare. This extends their leadership of more than 3 years in providing series of full TOEs and systems powered by them. Their mature, network proven series of TOE&apos;s have been deployed in hundreds of networks worldwide including blue-chip companies, financial institutions and major world stock exchanges enabling trade executions in record 1 us. The new platform is bound to shatter this record by yet another few hundred Nano seconds! It is also removing major traffic bottlenecks in Networks around the world.<br />
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The Full System FPGA platforms provide an &apos;out of the box&apos; ready to use FPGA board where users can immediately start integrating/running the ultra-low latency full TCP offload hardware with their application software or with their hardware applications. This offers tremendous advantages by simplifying the tedious task of integration while removing risk of integrating a complex system on an FPGA. <br />
<br />
This Hyper Accelerated FPGA Platform with all its integrated sub-system components; pegs the latency from Wire-to-User-FIFO at an unprecedented 230 ns! This opens up a new chapter in the &apos;Race-to-Zero Latency&apos;.<br />
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This &apos;Game-changing&apos; 76 ns TOE Technology&apos; that delivers unprecedented performance at 20Gbps in full duplex is 100X faster than legacy TCP/IP software. This is the most deterministic performance with zero jitter by any complex protocol processor ever. <br />
<br />
Intilop&apos;s series of full <a class="extlink"  target="_blank"  rel="nofollow noopener" title="TCP/UDP Offload Engines" href="http://www.intilop.com">TCP/UDP Offload Engines</a> provide enormous benefits to the whole Networking industry including: Financial, Aerospace &amp; Defense, Cloud computing, High Performance Computing, Telecom, Digital Broadcasting, Research, Data-centers, Wireless and Network storage industries. <br />
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Intilop was the first company to deliver full TCP/IP stack in FPGA in early 2009 and has consistently broken latency and performance records with their subsequent products. "These new full System FPGA platforms based around our flagship Nano TOEs &amp; EMACs further extend our leadership and are pleased to see accelerated pace of adoption in the networks worldwide", says Kelly Masood, Intilop&apos;s CTO.<br />
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Availability: Now. <br />
Pricing, Product information and Demos; info@intilop.com<br />
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About Intilop<br />
Intilop Corporation is a developer and pioneer in advanced networking <a class="extlink"  target="_blank"  rel="nofollow noopener" title="silicon SoC IP" href="http://www.intilop.com">silicon SoC IP</a> and system solutions, custom hardware solutions, SoC/ASIC/FPGA integrator and total system solutions provider for Networking, Network Security, storage and Embedded Systems. They offer silicon proven semiconductor IPs and comprehensive hardware/software solutions. <br />
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Visit:  <a class="extlink"  target="_blank"  rel="nofollow noopener" title="http://www.intilop.com" href="http://www.intilop.com">http://www.intilop.com</a></p><p>For more information on this press release visit: <a rel="nofollow" href="http://www.releasewire.com/press-releases/release-3.htm">http://www.releasewire.com/press-releases/release-3.htm</a></p></div><h2>Media Relations Contact</h2><p>Kevin Moore<br />Intilop Corporation<br />Telephone: 408-496-0333<br />Email: <a rel="nofollow" href="http://www.sbwire.com/press-releases/contact/149246">Click to Email Kevin Moore</a><br />Web: <a rel="nofollow" href="http://www.intilop.com">http://www.intilop.com</a><br /></div><div><p><img src="https://cts.releasewire.com/v/?sid=149246&amp;s=f&amp;v=f" width="1" height="1" alt=""><span></span></p></div>]]></description>
      <pubDate>Wed, 20 Jun 2012 11:45:00 -0500</pubDate>
      <guid>http://www.releasewire.com/press-releases/release-3.htm</guid>
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      <title>Intilop's Nano TOE Performs Full TCP/IP Stack Processing in Yet Another Record Breaking 76 Nanoseconds</title>
      <link>http://www.releasewire.com/press-releases/release-3.htm</link>
      <description><![CDATA[<div class="newsleft"><div class="newsbody"><p class="subheadline">Intilop extends their lead by delivering ‘Game Changing Nano TOE Hardware Technology’ that is 1000 X faster than Software and is revolutionizing the Financial, HFT, HPC, Cloud Servers, wireless base stations, Storage, defense and other networking markets today.</p><p>Santa Clara, CA -- (<a rel="nofollow" href="http://www.sbwire.com/">SBWIRE</a>) -- 05/21/2012 --  Intilop, Inc. a pioneer and a recognized leader in providing complex networking <a class="extlink"  target="_blank"  rel="nofollow noopener" title="IP building blocks" href="http://www.intilop.com">IP building blocks</a> and systems, today announced delivery of their new Ultra Low latency 4th Gen 10G Nano TCP/IP Offload Engine &apos;<a class="extlink"  target="_blank"  rel="nofollow noopener" title="TOE" href="http://www.intilop.com">TOE</a>&apos;. This extends their leadership of more than 3 years in providing full TOEs. Their mature, network proven series of TOE&apos;s have been deployed in hundreds of networks worldwide, including major world stock exchanges and financial institutions enabling trade executions in less than 1 microseconds and transferring multi Gigabytes of data in <a class="extlink"  target="_blank"  rel="nofollow noopener" title="Cloud Servers" href="http://www.intilop.com">Cloud Servers</a> now!. That is about 100 times faster than ever before. <br />
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Intilop&apos;s <a class="extlink"  target="_blank"  rel="nofollow noopener" title="Nano TOE" href="http://www.intilop.com">Nano TOE</a> provides enormous benefits to the whole Networking industry including: Financial, Aerospace &amp; Defense, Cloud computing, High Performance Computing, Telecom, Digital Broadcasting, Research Institutes, Data-centers, Wireless and Network storage industries.<br />
	<br />
This <a class="extlink"  target="_blank"  rel="nofollow noopener" title="Nano TOE IP Core" href="http://www.intilop.com">Nano TOE IP Core</a> delivers unprecedented latency measured at 76 nanoseconds at 100% 20Gbps in full duplex. This is the most deterministic and jitter free performance ever by any complex protocol controller. It is fully compliant with IEEE-802.3 specifications and RFCs of the TCP/IP protocol<br />
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The <a class="extlink"  target="_blank"  rel="nofollow noopener" title="Nano TOE IP-Core" href="http://www.intilop.com">Nano TOE IP-Core</a> series implements many key standards and protocols in pure hardware such as; IPv4, ARP, ICMP, VLAN, Jumbo frames up to 9K bytes plus many more options. TOE implements up to 256 concurrent TCP sessions that can easily be scaled up or down. It allows seamless drop-in integration with FPGA devices and ASICs. <br />
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<a class="extlink"  target="_blank"  rel="nofollow noopener" title="Nano TOE" href="http://www.intilop.com">Nano TOE</a> is also pre-integrated with Intilop&apos;s low latency (20 ns) MAC as an IP Core bundle which delivers unprecedented lowest total latency of 96 nanoseconds from the EMAC&apos;s input to TOE&apos;s output. Also available as pre-integrated full system with PCIe/DMA tested on FPGA platforms. An optimized version of which can deliver a total system latency of 1 us from wire to user-space.<br />
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Intilop was the first company to deliver full TCP/IP stack in FPGA in early 2009 and has consistently broken latency records with their subsequent products.<br />
<br />
"These new <a class="extlink"  target="_blank"  rel="nofollow noopener" title="Nano-TOE" href="http://www.intilop.com">Nano-TOE</a> and MAC IP Cores and solutions extend our leadership in the industry and add another feather in our hat. Our existing series of complex mega IP cores and solutions have been delivering unprecedented performance in networks worldwide", says Kelly Masood, Intilop&apos;s CTO.<br />
<br />
Availability: Now. <br />
Pricing and Product info; Kevin Moore, 408-496-0333. Kevinm@intilop.com, info@intilop.com<br />
<br />
About Intilop<br />
<a class="extlink"  target="_blank"  rel="nofollow noopener" title="Intilop Corporation" href="http://www.intilop.com">Intilop Corporation</a> is a developer and pioneer in advanced networking silicon IP and system solutions, custom hardware solutions, SoC/ASIC/FPGA integrator and total system solutions provider for Networking, Network Security, storage and Embedded Systems. They offer silicon proven semiconductor IPs with comprehensive hardware and software solutions.</p><p>For more information on this press release visit: <a rel="nofollow" href="http://www.releasewire.com/press-releases/release-3.htm">http://www.releasewire.com/press-releases/release-3.htm</a></p></div><h2>Media Relations Contact</h2><p>Kevin Moore<br />Intilop Corporation<br />Telephone: 408-496-0333<br />Email: <a rel="nofollow" href="http://www.sbwire.com/press-releases/contact/143512">Click to Email Kevin Moore</a><br />Web: <a rel="nofollow" href="http://www.intilop.com">http://www.intilop.com</a><br /></div><div><p><img src="https://cts.releasewire.com/v/?sid=143512&amp;s=f&amp;v=f" width="1" height="1" alt=""><span></span></p></div>]]></description>
      <pubDate>Mon, 21 May 2012 13:41:13 -0500</pubDate>
      <guid>http://www.releasewire.com/press-releases/release-3.htm</guid>
    </item>
  </channel>
</rss>
